Embodiments of the inventive subject matter generally relate to the field of multi-core processors, and, more particularly, to processing codes units on multi-core heterogeneous processors.
Multi-core heterogeneous processors consist of specialized cores with unique instruction set architectures (ISAs) and/or hardware architectures. Typically, a multi-core heterogeneous processor comprises a primary core for running general programs, such as operation systems, and multiple specialized secondary cores. The secondary cores may be optimized for handling graphics, mathematics, cryptography, etc. The primary core is responsible for offloading tasks to the secondary cores.